ASIC Engineer

Requirements:

• Bachelors or masters degree in electrical engineering, computer engineering, computer science, or a related field
• 1–3 years of experience developing and implementing ASIC designs
• Strong experience with RTL design using Verilog/SystemVerilog and/or analog or mixed-signal IC design
• Solid understanding of digital design fundamentals, including timing, clocking, and power
• Experience with ASIC tool flows such as Synopsys, Cadence, or similar tools
• Familiarity with verification methodologies; UVM experience is a plus
• Strong problem-solving skills and ability to work across disciplines
• Willingness to work full-time onsite in Atlanta, Georgia
• Preferred: Problem-solving experience in complex digital design areas such as clock-domain crossing, timing optimization, and low-power design
• Preferred: Hands-on experience with industry EDA tools, including HDL simulators, linting tools, and FPGA development platforms
• Preferred: Proficiency in scripting languages such as Python or Tcl for design automation and verification workflows
• To meet U.S. Government export regulations, including ITAR, applicants must be U.S. citizens, lawful permanent residents, protected individuals as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State

Responsibilities:

• Design and implement digital and/or mixed-signal ASIC blocks from specification through tapeout
• Develop RTL using Verilog/SystemVerilog and/or transistor-level designs, depending on the area of focus
• Work with RFIC, analog, and system engineers to integrate digital logic into RF and mixed-signal chip architectures
• Perform synthesis, timing closure, and power optimization
• Partner with verification engineers to define testbenches and validate designs
• Support functional verification and debug ASIC components with verification teams
• Assist with synthesis, timing analysis, and physical implementation to prepare designs for tapeout
• Contribute to silicon bring-up, debugging, and post-silicon validation
• Document design architecture, implementation details, and verification results

Technologies:

• FPGA
• Support
• Python
• SystemVerilog
• Verilog
• Hardware

More

At Falcomm, we turn semiconductor research into products through energy-efficient RF power amplifiers and wireless solutions, advancing the performance, efficiency, and integration of modern communication systems. We are seeking an ASIC Engineer to help develop mixed-signal and digital integrated circuits that interface with our RF technologies and form part of larger system-on-chip platforms. The role involves close collaboration with RFIC, analog, verification, and system engineering teams. We offer a competitive salary and equity package, comprehensive health, dental, and vision insurance, a 401(k) plan, paid time off, and sick leave. Falcomm is an equal opportunity employer and provides reasonable accommodation during the application and interview process.

last updated 43 week of 2026